18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAMCY7C1386D, CY7C1386FCY7C1387D, CY7C1387FCypress Semiconductor Corporation • 198 Champion Court
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 10 of 30Truth Table for Read/Write [6, 9]Function (CY7C1386D/CY7C1386F)
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 11 of 30IEEE 1149.1 Serial Boundary Scan (JTAG)The CY7C1386D/CY7C1387D/
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 12 of 30When the TAP controller is in the Capture-IR state, the twoleas
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 13 of 30the TAP controller, it will directly control the state of the o
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 14 of 303.3V TAP AC Test ConditionsInput pulse levels ...
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 15 of 30Identification Register DefinitionsInstruction FieldCY7C1386D/C
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 16 of 30119-Ball BGA Boundary Scan Order[14, 15] Bit # Ball ID Bit # Ba
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 17 of 30165-Ball BGA Boundary Scan Order[14, 16] Bit # Ball ID Bit # Ba
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 18 of 30Maximum RatingsExceeding the maximum ratings may impair the use
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 19 of 30Capacitance [19]Parameter Description Test Conditions100 TQFPMa
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 2 of 30Logic Block Diagram – CY7C1386D/CY7C1386F [3] (512K x 36)Logic B
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 20 of 30Switching Characteristics Over the Operating Range [20, 21]Para
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 21 of 30Switching Waveforms Read Cycle Timing [26]tCYCtCLCLKADSPtADHtAD
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 22 of 30Write Cycle Timing [26, 27]Switching Waveforms (continued)tCYC
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 23 of 30Read/Write Cycle Timing [26, 28, 29]Switching Waveforms (conti
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 24 of 30ZZ Mode Timing [30, 31]Switching Waveforms (continued)tZZISUPP
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 25 of 30Ordering InformationNot all of the speed, package, and temperat
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 26 of 30250 CY7C1386D-250AXC 51-85050 100-pin Thin Quad Flat Pack (14 x
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 27 of 30Package Diagrams Figure 1. 100-Pin Thin Plastic Quad Flat pack
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 28 of 30Figure 2. 119-Ball BGA (14 x 22 x 2.4 mm) (51-85115)Package Dia
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 29 of 30© Cypress Semiconductor Corporation, 2006-2007. The information
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 3 of 30Pin Configurations AAAAA1A0NC/72MNC/36MVSSVDDAAAAAAAADQPBDQBDQBV
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 30 of 30Document History PageDocument Title: CY7C1386D/CY7C1387D/CY7C13
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 4 of 30Pin Configurations (continued)2345671ABCDEFGHJKLMNPRTUVDDQNC/28
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 5 of 30Pin Configurations (continued)165-Ball FBGA Pinout (3 Chip Enab
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 6 of 30Pin DefinitionsName IO DescriptionA0, A1, A Input-SynchronousAdd
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 7 of 30Functional OverviewAll synchronous inputs pass through input reg
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 8 of 30The write signals (GW, BWE, and BWX) and ADV inputs areignored d
CY7C1386D, CY7C1386FCY7C1387D, CY7C1387FDocument Number: 38-05545 Rev. *E Page 9 of 30Truth Table [4, 5, 6, 7, 8] Operation Add. Used CE1CE2CE3ZZ ADSP
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