Cypress enCoRe CY7C602xx Bedienungsanleitung PDF herunterladen (Seite 61)

CY7C601xx, CY7C602xx

Document 38-16016 Rev. *E Page 61 of 68

Figure 20-2. GPIO Timing Diagram

Figure 20-3. SPI Master Timing, CPHA = 1

10%

T

R_GPIO

T

F_GPIO

GPIO Pin Output

Voltage

90%

MSB

T

MSU

LSB

T

MHD

T

SCKH

T

MDO

SS

SCK (CPOL=0)

SCK (CPOL=1)

MOSI

MISO

(SS is under firmware control in SPI Master mode)

T

SCKL

MSB LSB

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