Cypress CY14E256L Bedienungsanleitung

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CY14E256L
256 Kbit (32K x 8) nvSRAM
Cypress Semiconductor Corporation 198 Champion Court San Jose
,
CA 95134-1709 408-943-2600
Document Number: 001-06968 Rev. *H Revised November 26, 2009
Features
25 ns, 35 ns, and 45 ns Access Times
Pin Compatible with STK14C88
Hands Off Automatic STORE on Power Down with External
68 µF Capacitor
STORE to QuantumTrap Nonvolatile Elements is Initiated by
Software, Hardware, or AutoStore on Power Down
RECALL to SRAM Initiated by Software or Power Up
Unlimited READ, WRITE, and RECALL Cycles
1,000,000 STORE Cycles to QuantumTrap
100 Year Data Retention to QuantumTrap
Single 5V±10% Operation
Commercial and Industrial Temperature
32-Pin SOIC Package (RoHS Compliance)
CDIP (300 mil) Package
Functional Description
The Cypress CY14E256L is a fast static RAM with a nonvolatile
element in each memory cell. The embedded nonvolatile
elements incorporate QuantumTrap technology producing the
world’s most reliable nonvolatile memory. The SRAM provides
unlimited read and write cycles, while independent, nonvolatile
data resides in the highly reliable QuantumTrap cell. Data
transfers from the SRAM to the nonvolatile elements (the
STORE operation) takes place automatically at power down. On
power up, data is restored to the SRAM (the RECALL operation)
from the nonvolatile memory. Both the STORE and RECALL
operations are also available under software control. A hardware
STORE is initiated with the HSB
pin.
STORE/
RECALL
CONTROL
POWER
CONTROL
SOFTWARE
DETECT
STATIC RAM
ARRAY
512 X 512
Quantum Trap
512 X 512
STORE
RECALL
COLUMN I/O
COLUMN DEC
ROW DECODER
INPUT BUFFERS
OE
CE
WE
HSB
V
CC
V
CAP
A
13
-
A
0
A
0
A
1
A
2
A
3
A
4
A
10
A
5
A
6
A
7
A
8
A
9
A
11
A
12
A
13
A
14
DQ
0
DQ
1
DQ
2
DQ
3
DQ
4
DQ
5
DQ
6
DQ
7
Logic Block Diagram
Not Recommended for New Designs
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Inhaltsverzeichnis

Seite 1 - 256 Kbit (32K x 8) nvSRAM

CY14E256L256 Kbit (32K x 8) nvSRAMCypress Semiconductor Corporation • 198 Champion Court • San Jose,CA 95134-1709 • 408-943-2600Document Number: 001-0

Seite 2

CY14E256LDocument Number: 001-06968 Rev. *H Page 10 of 19AC Switching Characteristics SRAM Read CycleParameterDescription25 ns 35 ns 45 ns UnitMin M

Seite 3

CY14E256LDocument Number: 001-06968 Rev. *H Page 11 of 19SRAM Write CycleParameterDescription25 ns 35 ns 45 ns UnitMin Max Min Max Min MaxCypressPar

Seite 4

CY14E256LDocument Number: 001-06968 Rev. *H Page 12 of 19AutoStore or Power Up RECALLParameter Alt DescriptionCY14E256LUnitMin MaxtHRECALL [15]tRESTOR

Seite 5

CY14E256LDocument Number: 001-06968 Rev. *H Page 13 of 19Software Controlled STORE/RECALL CycleThe software controlled STORE/RECALL cycle follows. [19

Seite 6

CY14E256LDocument Number: 001-06968 Rev. *H Page 14 of 19Hardware STORE CycleParameter Alt DescriptionCY14E256LUnitMin MaxtDHSB [16, 20]tRECOVER, tHHQ

Seite 7

CY14E256LDocument Number: 001-06968 Rev. *H Page 15 of 19Ordering InformationThese parts are not recommended for new designs.Speed(ns)Ordering Code Pa

Seite 8

CY14E256LDocument Number: 001-06968 Rev. *H Page 16 of 19Package DiagramFigure 14. 32-Pin (300 Mil) SOIC (51-85127)51-85058 *APIN 1 IDSEATING PLANE11

Seite 9

CY14E256LDocument Number: 001-06968 Rev. *H Page 17 of 19Figure 15. 32-Pin (300 Mil) CDIP (001-51694)Package Diagram (continued)001-51694 **Not Recom

Seite 10 - CY14E256L

CY14E256LDocument Number: 001-06968 Rev. *H Page 18 of 19Document History PageDocument Title: CY14E256L 256 Kbit (32K x 8) nvSRAM Document Number: 001

Seite 11

Document Number: 001-06968 Rev. *H Revised November 26, 2009 Page 19 of 19All products and company names mentioned in this document may be the tradema

Seite 12 - HRECALL

CY14E256LDocument Number: 001-06968 Rev. *H Page 2 of 19ContentsFeatures ...

Seite 13

CY14E256LDocument Number: 001-06968 Rev. *H Page 3 of 19 Pin ConfigurationsFigure 1. Pin Diagram: 32-Pin SOIC/DIPTable 1. Pin DefinitionsPin Name Al

Seite 14

CY14E256LDocument Number: 001-06968 Rev. *H Page 4 of 19Device OperationThe CY14E256L nvSRAM is made up of two functional compo-nents paired in the sa

Seite 15

CY14E256LDocument Number: 001-06968 Rev. *H Page 5 of 19Hardware STORE (HSB) OperationThe CY14E256L provides the HSB pin for controlling andacknowledg

Seite 16

CY14E256LDocument Number: 001-06968 Rev. *H Page 6 of 19Data ProtectionThe CY14E256L protects data from corruption during lowvoltage conditions by inh

Seite 17

CY14E256LDocument Number: 001-06968 Rev. *H Page 7 of 19Best Practices nvSRAM products have been used effectively for over 15 years.While ease of use

Seite 18

CY14E256LDocument Number: 001-06968 Rev. *H Page 8 of 19Maximum RatingsExceeding maximum ratings may shorten the useful life of thedevice. These user

Seite 19 - Products

CY14E256LDocument Number: 001-06968 Rev. *H Page 9 of 19VOHOutput HIGH Voltage IOUT = –4 mA 2.4 VVOLOutput LOW Voltage IOUT = 8 mA 0.4 VVBLLogic ‘0’

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