36-Mbit QDR™-II SRAM 2-WordBurst ArchitectureCY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Cypress Semiconductor Corporation • 198 Champion Cour
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 10 of 29Truth TableThe truth table for CY7C1410AV18, CY7C1425AV1
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 11 of 29Write Cycle DescriptionsThe write cycle description tabl
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 12 of 29IEEE 1149.1 Serial Boundary Scan (JTAG)These SRAMs incor
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 13 of 29IDCODEThe IDCODE instruction loads a vendor-specific, 32
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 14 of 29TAP Controller State DiagramThe state diagram for the TA
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 15 of 29TAP Controller Block DiagramTAP Electrical Characteristi
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 16 of 29TAP AC Switching Characteristics Over the Operating Rang
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 17 of 29Identification Register Definitions Instruction FieldVal
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 18 of 29Boundary Scan Order Bit # Bump ID Bit # Bump ID Bit # Bu
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 19 of 29Power Up Sequence in QDR-II SRAMQDR-II SRAMs must be pow
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 2 of 29Logic Block Diagram (CY7C1410AV18)Logic Block Diagram (CY
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 20 of 29Maximum RatingsExceeding maximum ratings may impair the
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 21 of 29ISB1Automatic Power down CurrentMax VDD, Both Ports Dese
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 22 of 29CapacitanceTested initially and after any design or proc
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 23 of 29Switching Characteristics Over the Operating Range [20,
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 24 of 29Switching WaveformsFigure 5. Read/Write/Deselect Sequen
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 25 of 29Ordering Information Not all of the speed, package and t
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 26 of 29167 CY7C1410AV18-167BZC 51-85195 165-Ball Fine Pitch Bal
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 27 of 29Package DiagramFigure 6. 165-Ball FBGA (15 x 17 x 1.4 mm
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 28 of 29Document History PageDocument Title: CY7C1410AV18/CY7C14
Document #: 38-05615 Rev. *E Revised June 13, 2008 Page 29 of 29QDR RAMs and Quad Data Rate RAMs comprise a new family of products developed by Cypres
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 3 of 29Logic Block Diagram (CY7C1412AV18)Logic Block Diagram (CY
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 4 of 29Pin Configuration The pin configuration for CY7C1410AV18,
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 5 of 29CY7C1412AV18 (2M x 18)1 2 3 4 5 6 7 8 9 10 11A CQ NC/144M
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 6 of 29Pin Definitions Pin Name IO Pin DescriptionD[x:0]Input-Sy
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 7 of 29CQ Echo Clock CQ Referenced with Respect to C. This is a
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 8 of 29Functional OverviewThe CY7C1410AV18, CY7C1425AV18, CY7C14
CY7C1410AV18, CY7C1425AV18CY7C1412AV18, CY7C1414AV18Document #: 38-05615 Rev. *E Page 9 of 29Programmable ImpedanceAn external resistor, RQ, must be c
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