Cypress CY7C1364C Bedienungsanleitung PDF herunterladen (Seite 13)

CY7C1364C

Document #: 38-05689 Rev. *E Page 13 of 18

Write Cycle Timing

[18,19]

Note:

19.

Full width Write can be initiated by either GW

LOW; or by GW HIGH, BWE LOW and BW

[A:D]

LOW.

Switching Waveforms (continued)

CYC

CLK

ADSP

ADH

ADS

ADDRESS

ADSC

CEH

CES

BWE,

BW[A :D]

ata Out (Q)

High-Z

ADV

BURST READ BURST WRITE

D(A2) D(A2 + 1) D(A2 + 1)

D(A1)

D(A3) D(A3 + 1) D(A3 + 2)D(A2 + 3)

A2 A3

Data In (D)

Extended BURST WRITE

D(A2 + 2)

Single WRITE

ADH

ADS

ADH

ADS

OEHZ

ADVH

ADVS

WEH

WES

WEH

WES

Byte write signals are

ignored for first cycle when

ADSP initiates burst

ADSC extends burst

ADV suspends burst

DON’T CARE

UNDEFINED

[+] Feedback

1 2 ... 8 9 10 11 12 13 14 15 16 17 18

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