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CY62158E MoBL

Document #: 38-05684 Rev. *D Page 6 of 10

Switching Waveforms

Figure 4 shows address transition controlled read cycle waveforms.

[13, 14]

Figure 4. Read Cycle No. 1

Figure 5 shows OE

controlled read cycle waveforms.

[14, 15]

Figure 5. Read Cycle No. 2

ADDRESS

DATA OUT

PREVIOUS DATA VALID

DATA VALID

OHA

50%

DATA VALID

ACE

DOE

LZOE

LZCE

HIGH IMPEDANCE

HZOE

HZCE

HIGH

IMPEDANCE

ADDRESS

DATA OUT

SUPPLY

CURRENT

Notes

13. Device is continuously selected. OE

, CE

= V

, CE

= V

14. WE

is HIGH for read cycle.

15. Address valid before or similar to CE

transition LOW and CE

transition HIGH.

[+] Feedback

1 2 3 4 5 6 7 8 9 10

8-Mbit (1M x 8) Static RAM 1
CY62158E MoBL 10

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