
Chapter 3. The Cray T3E system 23
Attribute Value
Processor type DEC Alpha 21164
Physical address base 40 bits
Virtual address base 43 bits
Clock rate on the T3E 375 MHz
Peak floating-point rate 750 Mflop/s
Peak instruction issue rate 4 (2 floating-point + 2 integer)
Size of the on-chip instruction cache 8 kB
Size of the on-chip level 1 data cache 8 kB
Size of the on-chip level 2 data cache 96 kB
Table 3.1: Characteristics of the DEC Alpha 21164 processor.
3.4 Processor architecture
The microprocessor in each of the T3E nodes is a DEC Alpha 21164,
a RISC processor manufactured by COMPAQ/Digital. This 64-bit pro-
cessor is cache-based, superscalar, and has pipelined functional units.
It supports the IEEE standard for 32-bit and 64-bit floating point arith-
metics.
The range of a 64-bit floating point number is
2.2250738585072014 · 10
−308
...1.7976931348623157 · 10
+308
.
The mantissa contains 53 bits, and therefore the precision is about 16
decimal numbers.
Correspondingly, 32-bit floating point numbers are between
1.17549435 · 10
−38
...3.40282347 · 10
+38
The mantissa contains 24 bits (the leading bit is not stored), and the
precision is about 7 decimal numbers.
Specific characteristics of the processor are presented in Table 3.1.The
structure of the processor is illustrated in Figure 3.2.
Instruction
Cache
8 kB
Instruction
Fetch/
Decode
and
Branch
Unit
Integer
Integer
FP (add)
FP (mul)
Merge
Logic
Data
Cache
8 kB
Write-
Through
Second-
Level
Cache
96 kB
Write-
Back
Bus
Interface
Unit
21164
40-bit
Address
Bus
128-bit
Data
Figure 3.2: The DEC Alpha 21164 processor architecture.
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