Cypress CSC-1200T Betriebsanweisung Seite 25

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Chapter 3. The Cray T3E system 25
two words in each cp. An SCACHE line is 64 bytes. Therefore, data is
moved in consecutive blocks of 64 bytes from the main memory.
When you are optimizing your code, the most important thing is to
optimize the usage of the DCACHE. Almost as important is to optimize
the usage of the SCACHE.
Because of the reasons mentioned above, try to avoid step sizes of 8 kB
or 32 kB when you are referencing memory. The most optimal way is
to use stride one, which in the case of Fortran means changing the first
index of arrays with a step size of one.
Here is a simple example of memory references:
REAL, DIMENSION(n) :: a, b
REAL, DIMENSION(n,n) :: c
INTEGER :: i, j
DOi=1,n
DOj=1,n
c(i,j) = c(i,j) + a(i)*b(j)
END DO
END DO
If the constant n is of size 1024, the code runs very slowly due to the
memory references c(1,1), c(1,2), c(1,3) etc., which are 8 kB apart
in memory. You should rearrange the loops as follows to get better
performance:
DOj=1,n
DOi=1,n
c(i,j) = c(i,j) + a(i)*b(j)
END DO
END DO
3.6 Interprocessor communication
The system PEs of the Cray T3E are connected through a high-speed, low-
latency interconnection network. The peak data-transfer speed between
processors is 480 MB/s in every direction through the bi-directional 3D
torus network. The hardware latency is less than 1 µs.
The T3E system interconnection network operates asynchronously and
independently from the PEs to access and redistribute global data. The
3D torus topology ensures short connection paths. The bisectional band-
width is also high (measured by splitting the machine in half and finding
out the maximum transfer rate between these parts). The topology has
also the ability to avoid failed communication pathways.
An example of routing through the interconnection network is presented
in Figure 3.4.
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