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CY14B101LPRELIMINARY

Document #: 001-06400 Rev. *E Page 4 of 18

Figure 1. AutoStore Mode

Hardware STORE Operation

The CY14B101L provides the HSB pin for controlling and

acknowledging the STORE operations. Use the HSB

pin to

request a hardware STORE cycle. When the HSB

pin is driven

low, the CY14B101L conditionally initiates a STORE operation

after t

DELAY

. An actual STORE cycle only begins if a WRITE to

the SRAM took place since the last STORE or RECALL cycle.

The HSB pin also acts as an open drain driver that is internally

driven low to indicate a busy condition while the STORE

(initiated by any means) is in progress.

SRAM READ and WRITE operations that are in progress

when HSB

is driven low by any means are given time to

complete before the STORE operation is initiated. After HSB

goes low, the CY14B101L continues SRAM operations for

DELAY

. During t

DELAY

, multiple SRAM READ operations may

take place. If a WRITE is in progress when HSB

is pulled low

it will be allowed a time, t

DELAY

to complete. However, any

SRAM WRITE cycles requested after HSB

goes low will be

inhibited until HSB

returns high.

During any STORE operation, regardless of how it was

initiated, the CY14B101L continues to drive the HSB

pin low,

releasing it only when the STORE is complete. Upon

completion of the STORE operation the CY14B101L remains

disabled until the HSB

pin returns high. Leave the HSB uncon-

nected if is not used.

Hardware RECALL (Power Up)

During power up or after any low power condition

SWITCH

), an internal RECALL request will be latched.

When V

once again exceeds the sense voltage of V

SWITCH

a RECALL cycle will automatically be initiated and takes

HRECALL

to complete.

Software STORE

Transfer data from the SRAM to the nonvolatile memory with

a software address sequence. The CY14B101L software

STORE cycle is initiated by executing sequential

-controlled READ cycles from six specific address locations

in exact order. During the STORE cycle an erase of the

previous nonvolatile data is first performed, followed by a

program of the nonvolatile elements. Once a STORE cycle is

initiated, further input and output are disabled until the cycle is

completed.

Because a sequence of READs from specific addresses is

used for STORE initiation, it is important that no other READ

or WRITE accesses intervene in the sequence. If there are

intervening READ or WRITE accesses, the sequence will be

aborted and no STORE or RECALL takes place.

To initiate the software STORE cycle, the following READ

sequence must be performed:

1. Read Address 0x4E38 Valid READ

2. Read Address 0xB1C7 Valid READ

3. Read Address 0x83E0 Valid READ

4. Read Address 0x7C1F Valid READ

5. Read Address 0x703F Valid READ

6. Read Address 0x8FC0 Initiate STORE Cycle

The software sequence may be clocked with CE

controlled

READs or OE

controlled READs. Once the sixth address in the

sequence has been entered, the STORE cycle commences

and the chip will be disabled. It is important that READ cycles

and not WRITE cycles be used in the sequence, although it is

not necessary that OE be low for the sequence to be valid.

After the t

STORE

cycle time has been fulfilled, the SRAM will

again be activated for READ and WRITE operation.

Software RECALL

Transfer the data from the nonvolatile memory to the SRAM

by a software address sequence. A software RECALL cycle is

initiated with a sequence of READ operations in a manner

similar to the software STORE initiation. To initiate the

RECALL cycle, the following sequence of CE

controlled READ

operations must be performed:

1. Read Address 0x4E38 Valid READ

2. Read Address 0xB1C7 Valid READ

3. Read Address 0x83E0 Valid READ

4. Read Address 0x7C1F Valid READ

5. Read Address 0x703F Valid READ

6. Read Address 0x4C63 Initiate RECALL Cycle

Internally, RECALL is a two-step procedure. First, the SRAM

data is cleared and second, the nonvolatile information is

transferred into the SRAM cells. After the t

RECALL

cycle time

the SRAM will once again be ready for READ and WRITE

operations. The RECALL operation does not alter the data in

the nonvolatile elements.

CAP

10k Ohm

0.1 F

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