Cypress CY62158EV30 Bedienungsanleitung PDF herunterladen (Seite 54)

54 September 5, 2010

EPIConfigGPModeSet(EPI0_BASE,

(EPI_GPMODE_DSIZE_16 //16 Bit data

| EPI_GPMODE_ASIZE_12 //12 Bit address

| EPI_GPMODE_WORD_ACCESS //Use Word Access Mode

| EPI_GPMODE_READWRITE //Use read and write strobe pins

| EPI_GPMODE_READ2CYCLE //Reads take two cycles

| EPI_GPMODE_CLKPIN //EPI outputs clock to peripheral

| EPI_GPMODE_RDYEN ), //Peripheral emits a ready signal

0, //Not using frame signal, so ignore

0); //Not using clock enable, so ignore

EPIAddressMapSet(EPI0_BASE,

EPI_ADDR_PER_SIZE_64KB //64kB memory space

| EPI_ADDR_PER_BASE_A); //EPI base address is 0xA0000000

Memory Map

The LM3S9B96 FPGA expansion board memory map is shown in Table F-1. The default Stellaris

code maps this into the 0xA000.0XXX memory space. Detailed descriptions for each register are

provide in “Register Descriptions” on page 55.

NOTE: Ten bits are used for addressing, but the EPI controller allocates a 12-bit address space.

The result is that 0x0A00.0000 is equivalent to 0x0A00.0400, 0x0A00.0800, and

0x0A00.0C00.

Table F-1. FPGA Expansion Board Memory Map

VERSION 000 [15:0] Board and FPGA Design Version R 55

SYSCTRL 002 [15:0] System Control R/W 56

IRQEN 004 [15:0] Interrupt Enable R/W 57

IRQSTAT 006 [15:0] Interrupt Status R/W 57

MEMPAGE 008 [10:0] Memory Page R/W 58

TPAD 00A [7:0] Test Pad R/W 58

LCTRL

010

[3:0] LCD Control Set R/W

012

[3:0] LCD Control Clear R/W

CHRMKEY 022 [15:0] Chroma Key R/W 59

VCRM 026 [8:0] Video Capture Row Match R/W 59

VML 030 [15:0] Video Memory Address Low R/W 59

VMH 032 [4:0] Video Memory Address High R/W 59

VMS 034 [11:0] Video Memory Stride R/W 59

LRM 036 [7:0] LCD Row Match R/W 59

LVML 040 [15:0] LCD Video Memory Address Low R/W 60

LVMH 042 [4:0] LCD Video Memory Address High R/W 60

LVMS 044 [11:0] LCD Video Memory Stride register (in bytes). R/W 60

1 2 ... 49 50 51 52 53 54 55 56 57 58 59 ... 80 81

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Cypress CY62158EV30 Bedienungsanleitung Seite 54