Cypress DCT-1D Betriebsanweisung Seite 52

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52
CHAPTER 4. LAB TASK 2 - DESIGN A JPEG ACCELERATOR
shifting 17 steps:
Y [u, v] = round
(A[u, v] 8192 · δ[u, v]) · R[u, v] · 2
17
=
96 3 0 0 0 0 0 0
24 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
2 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
, (4.3)
which left only four non zero coefficients.
4.6.2 Design of a hardware accelerator for quantization
The following piece of code in jcdctmgr.c in jpegfiles calculates the quantization
of one block. Instead of division multiplication with the reciprocal is used.
Listing 4.4: C code for quantization in jcdctmgr.c.
i n t r e c i p r o c a l s [ ] = {2 0 4 8 , 29 7 9 , 3277 , 20 4 8 , 136 5 , 819 , 64 3 , 53 7 ,
2731 , 27 3 1 , 2341 , 17 25 , 1 2 60 , 5 65 , 54 6 , 5 9 6 ,
2341 , 25 2 1 , 2048 , 13 65 , 8 1 9 , 57 5 , 475 , 585 ,
2341 , 19 2 8 , 1489 , 11 30 , 6 4 3 , 37 7 , 410 , 529 ,
1820 , 14 8 9 , 88 6 , 58 5 , 482 , 301 , 318 , 42 6 ,
1365 , 9 3 6 , 5 9 6 , 5 1 2 , 4 0 5 , 31 5 , 290 , 356 ,
669 , 5 12 , 4 2 0 , 3 7 7 , 3 1 8 , 2 7 1 , 273 , 324 ,
455 , 3 56 , 3 4 5 , 3 3 4 , 2 9 3 , 3 2 8 , 318 , 3 3 1 } ;
. . .
f o r ( i = 0 ; i < DCTSIZE2 ; i ++) {
r v a l = r e c i p r o c a l s [ i ] ; / / 16 b i t
s i g n e d temp = w o rks p a ce [ i ] ; / / 16 b i t s i g n e d
temp = temp r v a l ;
i f ( temp & 0 x10000 ) {
temp = temp >> 1 7 ;
temp += 1 ; }
e l s e
temp = temp >> 1 7 ;
c o e f _ b l o c k [ i ] = ( s h o r t ) temp ; / / 16 b i t s i g n e d }
. . .
Preparation task 9
Design a HW Quantization unit (Q2 in Figure 4.1), that calculates exactly the same
values as the code in Listing 4.4. Instantiate your Q2 unit and modify the code in
listing 4.4. We propose that Q2 should be able to quantize 2 numbers per clock cycle.
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