Cypress DCT-1D Betriebsanweisung Seite 62

  • Herunterladen
  • Zu meinen Handbüchern hinzufügen
  • Drucken
  • Seite
    / 82
  • Inhaltsverzeichnis
  • LESEZEICHEN
  • Bewertet. / 5. Basierend auf Kundenbewertungen
Seitenansicht 61
62
CHAPTER 6. LAB TASK 4 - CUSTOM INSTRUCTIONS
suggests four Huffman tables. Two for the luminance, one for the DC values and one
for the AC values. And two for the chrominance channel one for the DC values and
one for the AC values. the size of the Huffman codes in a JPEG stream varies from 1
to 16 bit.
6.1.2 The Problem
Although the lookup and replace is an easy operation the problem arises when we want
to write the bit stream to the memory. A consecutive stream of codes varying in length
from one 1 to 16 bits has to be written to memory.
In this lab your task is to design and add new hardware to the processor that can be
used by an instruction to ease the bit stream writing, the idea is that it can be used as
a normal store operation where the length of the data to be stored can be specified and
the data stream will be packed in memory, i.e. each Huffman code will follow directly
after the previous Huffman code.
Preparation task 11
Suggest a method to handle the bit field writing in software. Hint, look into the
jchuff.c
file in jpegfiles.
Preparation task 12
Suggest a method to handle the bit field writing in hardware.
6.2 Adding a New Instruction
In order to add a new instruction we first need to find a suitable instruction to use for
our purpose. Looking through the open RISC instruction set we find that there are
some instructions used for storing double words (64-bits) and we can thus “kidnap”
one of these instructions,
l.sd
is a suitable instruction to use. Of course if you feel like
recoding the assembler you can name your instruction whatever you feel like. How
you use this instruction is up to you, remember that for one vlx operation you have to
specify the code and the size of the code.
6.2.1 Making the Processor Understand
In order to add a new instruction we need to make the processor aware of the instruction
we intend to add. The first stage is to make some modifications to the instruction de-
coder. In the file or1200_ctrl.sv you will find a number of
‘ifdef OR1200_SBIT_IMPL
preprocessor directives. Inside some of these you will find a comment asking you to
write some code there. Find these places and add the missing code. Once this is
done correctly you should be able to use the
l.sd
instruction without causing an illegal
instruction exception but it will behave as a nop instruction.
6.2.2 Adding Special Purpose Registers
The hardware you are going to construct will use a number of special purpose reg-
isters to maintain observability and make it possible to handle some unusual situa-
Seitenansicht 61
1 2 ... 57 58 59 60 61 62 63 64 65 66 67 ... 81 82

Kommentare zu diesen Handbüchern

Keine Kommentare